FPGA Image Processing for High Resolution Positioning System

Alam, Salim

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dc.contributor	Picos Gayá, Rodrigo
dc.contributor.author	Alam, Salim
dc.date	2019
dc.date.accessioned	2020-02-14T09:03:06Z
dc.date.issued	2019-04-12
dc.identifier.uri	http://hdl.handle.net/11201/150892
dc.description.abstract	[eng] The goal of this project is to use FPGAs to interface multiple cameras to a port on a single computer and perform image processing for a high resolution multi- axis positioning system application. This thesis describes the use of the FPGA (Field Programmable Gate Arrays) for Real-time video processing. Capabilities of selected device family (Lattice MachXO3) are discussed with regard to video processing. The other board is a USB-3 interface to a computer is FX3 which has the ability to pass the data to Windows or any other operations system.	ca
dc.format	application/pdf
dc.language.iso	eng	ca
dc.publisher	Universitat de les Illes Balears
dc.rights	all rights reserved
dc.rights	info:eu-repo/semantics/openAccess
dc.subject	62 - Enginyeria. Tecnologia	ca
dc.subject	621.3 - Enginyeria elèctrica. Electrotècnia. Telecomunicacions	ca
dc.subject.other	FPGA, video processing, Lattice, MachXO3, FX3, High Definition, Camera, Multiple cameras, OV3640, VHDL, HDL, hardware design flow	ca
dc.title	FPGA Image Processing for High Resolution Positioning System	ca
dc.type	info:eu-repo/semantics/masterThesis	ca
dc.type	info:eu-repo/semantics/publishedVersion
dc.date.updated	2019-11-29T10:57:43Z
dc.date.embargoEndDate	info:eu-repo/date/embargoEnd/2050-01-01
dc.embargo	2050-01-01
dc.rights.accessRights	info:eu-repo/semantics/embargoedAccess