Hardware implementation of stochastic spiking neural networks

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dc.contributor.author Rossello, J.L.
dc.contributor.author Canals, V.
dc.contributor.author Morro, A.
dc.contributor.author Oliver, A.
dc.date.accessioned 2020-04-28T06:35:06Z
dc.date.available 2020-04-28T06:35:06Z
dc.identifier.uri http://hdl.handle.net/11201/152157
dc.description.abstract [eng] Spiking Neural Networks, the last generation of Artificial Neural Networks, are characterized by its bioinspired nature and by a higher computational capacity with respect to other neural models. In real biological neurons, stochastic processes represent an important mechanism of neural behavior and are responsible of its special arithmetic capabilities. In this work we present a simple hardware implementation of spiking neurons that considers this probabilistic nature. The advantage of the proposed implementation is that it is fully digital and therefore can be massively implemented in Field Programmable Gate Arrays. The high computational capabilities of the proposed model are demonstrated by the study of both feed-forward and recurrent networks that are able to implement high-speed signal filtering and to solve complex systems of linear equations.
dc.format application/pdf
dc.relation.isformatof Versió postprint del document publicat a: https://doi.org/10.1142/S0129065712500141
dc.relation.ispartof International Journal of Neural Systems, 2012, vol. 22, num. 4, p. 1-11
dc.rights (c) World Scientific Publishing Company, 2012
dc.subject.classification 53 - Física
dc.subject.other 53 - Physics
dc.title Hardware implementation of stochastic spiking neural networks
dc.type info:eu-repo/semantics/article
dc.type info:eu-repo/semantics/acceptedVersion
dc.date.updated 2020-04-28T06:35:06Z
dc.rights.accessRights info:eu-repo/semantics/openAccess
dc.identifier.doi https://doi.org/10.1142/S0129065712500141


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