dc.contributor.author |
Galán Pardo, Fabio |
|
dc.contributor.author |
Morán Costoya, Alejandro |
|
dc.contributor.author |
Font Rosselló, Joan |
|
dc.contributor.author |
Roca Adrover, Miguel Jesús |
|
dc.contributor.author |
Rosselló Sanz, José Luis |
|
dc.date.accessioned |
2024-01-22T12:42:47Z |
|
dc.date.available |
2024-01-22T12:42:47Z |
|
dc.identifier.uri |
http://hdl.handle.net/11201/164120 |
|
dc.description.abstract |
Spiking neural networks (SNN) are able to emulate real neural behavior with high confidence due to their bio-inspired nature. Many designs have been proposed for the implementation of SNN in hardware, although the realization of high-density and biologically-inspired SNN is currently a complex challenge of high scientific and technical interest. In this work, we propose a compact digital design for the implementation of high-volume SNN that considers the intrinsic stochastic processes present in biological neurons and enables high-density hardware implementation. The proposed stochastic SNN model (SSNN) is compared with previous SSNN models, achieving a higher processing speed. We also show how the proposed model can be scaled to high-volume neural networks trained by using back propagation and applied to a pattern classification task. The proposed model achieves better results compared with other recently-published SNN models configured with unsupervised STDP learning. |
|
dc.format |
application/pdf |
|
dc.relation.isformatof |
Versió postprint del document publicat a: https://doi.org/10.1142/S0129065719500047 |
|
dc.relation.ispartof |
International Journal of Neural Systems, 2019, vol. 29, num. 8 |
|
dc.rights |
(c) World Scientific Publishing Company, 2019 |
|
dc.subject.classification |
61 - Medicina |
|
dc.subject.classification |
62 - Enginyeria. Tecnologia |
|
dc.subject.other |
61 - Medical sciences |
|
dc.subject.other |
62 - Engineering. Technology in general |
|
dc.title |
Compact Hardware Synthesis of Stochastic Spiking Neural Networks |
|
dc.type |
info:eu-repo/semantics/article |
|
dc.type |
info:eu-repo/semantics/acceptedVersion |
|
dc.date.updated |
2024-01-22T12:42:47Z |
|
dc.subject.keywords |
Hardware de tipo neuromórfico |
|
dc.subject.keywords |
spiking neural networks |
|
dc.subject.keywords |
field-programmable gate arrays (FPGA) |
|
dc.rights.accessRights |
info:eu-repo/semantics/openAccess |
|
dc.identifier.doi |
https://doi.org/10.1142/S0129065719500047 |
|